The present invention relates to a resistive memory array architecture including resistive memory cells, in particular to a circuit and method for concurrently reading a plurality of memory cells in a resistive memory device.
Resistive random-access memories (RRAMs) are a type of resistive memory and have generated significant interest recently as a potential candidate for ultra-high density non-volatile information storage. A typical RRAM device has an insulator layer provided between a pair of electrodes and exhibits electrical pulse induced hysteretic resistance switching effects.
The resistance switching has been explained by the formation of conductive filaments inside the insulator due to Joule heating and electrochemical processes in binary oxides (e.g. NiO and TiO2) or redox processes for ionic conductors including oxides, chalcogenides and polymers. The resistance switching has also been explained by field assisted diffusion of ions in TiO2 and amorphous silicon (a—Si) films.
In the case of a—Si structures, electric field-induced diffusion of metal ions into the silicon leads to the formation of conductive filaments that reduce the resistance of the a—Si structure. These filaments remain after a biasing (or program) voltage is removed, thereby giving the device its non-volatile characteristic, and they can be removed by reverse flow of the ions back toward the metal electrode under the motive force of a reverse polarity applied voltage.
Resistive devices based on an a—Si structure, particularly that formed on polysilicon, typically exhibit good endurance or life cycle. However, the endurance of the resistive device can be shortened if excessive bias voltage is applied during the repeated write and erase cycles in part due to Joule heating and movements of an unnecessarily large number of metal ions in the a—Si structure. Furthermore, in general, RRAM device yield is affected by the electroforming process during which the major part of a conducting path is formed inside the insulating switching layer by applying larger voltage (or current) signal to the device.
RRAMs are commonly arranged in a crossbar array to obtain a high memory density. A memory device having a crossbar array typically requires pre-charging all of the memory cells to read one or more selected memory cells in order to limit the sneak paths and the amount of current leakage seen by the sensing circuits. This pre-charge requirement results in read out delays, increased read disturb, increased power consumption, and/or other disadvantages.